SerDes (serializer/deserializer) devices allow the transmission of data over a single differential pair instead of a parallel bus. A SerDes transmitter takes a parallel set of data bits (i.e., a data word) and converts it to a serial stream of bits for transmission over a single differential pair. The SerDes receiver reconstructs the data word from the received serial bit stream. In order to reconstruct the data word, the receiver needs to find the first bit of the word. This is referred to as a boundary word lock problem.
In data networking and transmission, there exist block synchronization 64B/66B and 64B/67B line codes that transform 64-bit data to 66-bit and 67-bit line codes, respectively, to achieve DC-balance and bounded disparity, and yet provide enough state changes to allow reasonable clock recovery. The receiver searches the incoming data stream for the 2-bit (64B/66B) or 3-bit (64B/67B) header for each 64 bit block.
Obtaining word boundary lock requires hardware to examine the data transitions received on a serial data line. The boundary of all words is marked by a 01 or 10 transition. However, not every transition marks the boundary of a word. The typical method for isolating the word boundary transitions requires the receiver to find a transition, advance N bits (N=66 or 67), and then check for another transition. If a transition is again found, the receiver continues to advance N bits and check for a transition until 64 consecutive transitions are found. If a transition is not found, the receiver must start over. This method relies on trial and error. Therefore, it can take a long and variable time to correctly identify the transition that marks a word boundary.